Radar and Remote Sensing

Real-time MPAR Digital Backend:
Initial Studies and Analysis of Challenges

Xining Yu
School of Electrical and Computer Engineering
Advanced Radar Research Center

07 November 2013, 1:15 PM

National Weather Center, Room 1350
120 David L. Boren Blvd.
University of Oklahoma
Norman, OK

Real-time digital backend is an important element of the future multi-functional phased array radar (MPAR) and other radar systems, and is critical for the overall engineering feasibility of a full-scale system. In June 2013, FAA and BCI released an initial MPAR backend analysis report, which outlined a solution roadmap mainly based on the Navy’s Modular Open Systems Architecture (MOSA). The current MOSA is originated from DoD since 1994, and is based on Gigabit-Ethernet as its data transportation backplane. The current MPAR backend analysis report is an important milestone but has significant issues. This presentation will address some of them such as: (1) Gigabit-Ethernet backplane, although has relative low operational risk, is not efficient for real-time MPAR operations. (2) The current analysis does not provide a strong case about the feasibility of a scalable digital backend. (3) Cost concerns.

The team in OU-ARRC has been performing initial analysis and studies on the real-time backend since 2008, and would like to propose the following considerations based on current results: (1) Rather than a pure Ethernet-based backend, a hybrid backend protocol system including the RapidIO (RIO), Gigabit-Ethernet and PCI-Express should be considered for optimal balance among computational performance, quality of service, power consumption and cost. (2) Serious simulation studies need to be performed to evaluate the scalable performance of MPAR array systems, to determine if a specific backend structure or configuration can fulfill the real-time requirements of radar missions including polarimetric weather surveillance. (3) Parallel computing and data transportation can reliably address the scalability issues.

As a preliminary example, a simulated system based on NSWRC notional requirements and realistic timing analysis of actual DSP, FPGA devices and high speed switching network models will be presented. The backplane network model is provided by IDT for precise traffic latency prediction with increasing system scale and complexity. Initial implementations of pulse compressions and beamforming are used as benchmarks for multiple beam-forming delay estimations. The key factors affecting the system real-time performance will be analyzed and initial timing-latency data with a scalable MPAR system will be discussed as a starting point for further investigations.

Other Contributors: Yan Zhang1, 2, Hernan Suarez1,2, John Meier2, Caleb Fulton and Barry Wood3
1 School of Electrical and Computer Engineering, University of Oklahoma
2. Advanced Radar Research Center, University of Oklahoma
3. Integrated Device Technology (IDT)

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Radar and Remote Sensing Seminar Series website